Welcome to Interview Questions Section on FullChipDesign.

Getting through interviews is always a challenging task and requires thorough preparation. Here is a list of probable questions that may appear in an interview related to RTL skills. Three areas are covered Digital Design, Digital Fundamentals and FPGA Design.

Most Popular Questions collections below, first is Digital Basics:

  • Give two ways of converting a two input NAND gate to an INVERTER. Solved here
  • Drive XOR from NAND gates. Drive XOR from NOR gates. Solved here
  • Discuss full custom logic to build 4 bit binary-adders. To solve: This will require building sequence of half-adder, full adder and finally 4-bit binary adder.
  • Now given you understand half-adder and full-adder truth tables. Can you drive the equations using Kmap minimization. Half-adder Solved here.
  • Access all Digital Fundamentals Interview Questions from Section below:
  • Digital Logic Basics Interview

    LTE - 4G Wireless Technology

    Digital fundamentals.

    Interview Questions.

    Most Popular Questions collections below, next section to be covered is Digital Logic Design:

  • Explain RTL? Hint: You need to explain in terms of registers, register transfer and micro-operations. Learn this topic from here
  • Explain replication and concatenation operator in verilog? Hint: Refer Verilog operators.  
  • How to design and FIFO and calculate FIFO depth for rate change implementations? Solved Here
  • How do you synchronize counters in async-fifo design with different read/write clocks.? Hint: use gray coding, Binary to gray.? Solved Here
  • How do determine total number of set bits in a 7 bit input? Hint: Use Full-adders.? Solved Here
  • Draw a circuit to expalin rising edge pulse detector? Hint: Also known as one-shot. Solved Here
  • Optical sensors A and B are positioned at 90 degrees to each other as shown in Figure. Half od the disc is white and remaining is black. When black portion is under sensor it generates logic 0 and logic 1 when white portion is under sensor. Solved Here
  • How to connect multiple bus's on shared bus interfaces, bidirectional IOs and shared memory interfaces?  
  • Access all Digital Logic Design Interview Questions from Section below:
  • Digital Logic Design Interview

    Tutorials @fullchipdesign.com

    Verilog Tutorial.

    LTE Tutorial.

    Memory Tutorial.

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