Full-Adder discussion. 

Full-adder is a digital circuit to perform arithmetic sum of two bits and a previous carry. The circuit involves two half-adders & one OR gate. Alternately 2 XOR gates, 2 AND gates and 1 OR gate. Access OR, AND and XOR gates details from here

Block Diagram of full-adder is discussed next:

Full Adder

So the expressions for the full adder are:-

Sum_out = [(in_x) XOR (in_y)] XOR [(carry_in)]
Carry_out = [(in_x) AND (in_y)] OR [ (in_x XOR in_y) AND carry_in ]

LTE - 4G Wireless Technology

Digital fundamentals.

Interview Questions.

By using equations above we can drive Truth Table for Full Adder. Details in table below.

Full Adder Truth-Table

Verilog RTL example and test-bench for full-adder.

4 - bit Binary Adder implementation, block diagram and discussion.

4 - bit Binary Adder-Subtractor implementation, block diagram and discussion.

Tutorials @fullchipdesign.com

Verilog Tutorial.

LTE Tutorial.

Memory Tutorial.

Symbol of Full Adder is shown below.

Full Adder symbol

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