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Verilog Tutorial.
Digital Basics Tutorial.
Verilog RTL.


Verilog operators. Initial statements and  ‘always’ block code. Refer System Verilog always_ff and always_comb from here.
Half-adder, Full-adder, Tri-state buffer inverted tristate buffer, shared bus interface with tristate buffer and tristate tb.  Digital counter enable/disable logic in rtl and tb
Python.
Python is a scripting language based on Object Oriented Principles with extensive support for engineering requirements. Python examples
File read, ‘sys.argv’, classes, global variables functions, File write, command line, classes in file writes, glob module
Python conditional statements, convert string to hexadecimal  value, strip off white space and convert hex to signed values.
Advanced program to read file, filter text, conversion to HEX, conversion from Hexadecimal to Signed Magnitude
Advanced python code to cover UNIX shell commands, read lines from a text file, ‘sysargv’ command line operations, use of class and multiple functions. 
Read binary files, Calling classes using main function, generate diamond pattern. Python error’s with complete code examples:- TypeError: __init__() takes exactly 2 arguments (1 given) TypeError: 'str' object is not callable
TypeError: not all arguments converted during string formatting. AttributeError:  ** instance has no attribute **
Logical Shift Right code, Logical Shift left (LSL) code, Circular Shift Right (CSR) code and Circular Shift Right (CSR) code. (Verilog)

3D draw and render new, 2D, 2D to 3D, ARC, 3D semi-cylindrical,  door,  Edgeing, drawer, colors  and render.

Android App Dev: Layout Intent to load static html. iphone5 home button not working?

Computer Organization.

Computer Introduction. Building blocks - ALU, ACC, PC, Registers, Stack Pointer, IR, timing and control unit.

Memory Organization.