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Tri-state buffer logic discussion
Verilog RTL example for tri-state logic buffer. Also discussed below are the output results.
module tristate_buffer(input_x, enable, output_x);
assign output_x = enable? input_x : 'bz;
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Output of above Tri-State Buffer code
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input_x = 0, enable = 0, output_x = z
input_x = 1, enable = 0, output_x = z
input_x = 1, enable = 1, output_x = 1
input_x = 0, enable = 1, output_x = 0
Digital Logic fundamentals topics
Binary number discussion, 1 and 2 complement discussion, Binary arithmetic, Signed Magnitude, overflow, examples, Gray coding, Binary coded digital (BCD) coding, BCD addition. Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates. 0iscussion of Boolean Algebra with examples. Duality Principle, Huntington Postulates, Theorems of Boolean Algebra - discussion with examples, Boolean Functions, Canonical and Standard Forms, Minterms and Maxterms Sum of Minterms, Product of Maxterms or Canonical Forms, Karnaugh map or K-map discussion 2, 3, ,4 and 5 var’s. Prime Implicant and Gate level minimization examples.
Tri-state buffer acts as a switch in digital circuit by isolating a signal path in
a circuit. This switch can attain three logical states. The three states are 0, 1
and ‘Z’. The logical state 0 and 1 are possible when the switch is CLOSE. The logical
value ‘Z’ or high impedance is attained when switch is OPEN. So when switch is open
the input to tristate buffer is isolated from the circuit and output can be driven
by some other logical path on a shared connection/bus.
We will discuss tri-state logic with brief introduction followed by Verilog code
to implement it at RTL level. Will also cover Inverting tristate buffer
Tristate Inv
Tristate Bus