Chip Designing for ASIC/ FPGA Design engineers and Students

FULLCHIPDESIGN

Digital-logic Design... Dream for many students… start learning front-end…

Custom Search

Feedback ? Send it to admin@fullchipdesign.com or join me at fullchip@gmail.com

Boolean Functions, equivalent truth table and gate level implementation.

Operator precedence for evaluating Boolean Expressions.

Highest Parentheses

NOT

AND

Lowest OR

Boolean function example:

F1 = (x + y)z’

Where F1 is a Boolean function of binary variables and binary operators. The binary variables and operators are specified below.

Binary variables = x, y and z

Binary operators = Parentheses, NOT, AND and OR

Solving or minimization of the functions are performed in a particular precedence shown below.

Representation of Boolean function in Truth Table

X (input)

Y (input)

Z (input)

F1 (output)

0

0

0

0

0

0

1

0

0

1

0

1

0

1

1

0

1

0

0

1

1

0

1

0

1

1

0

1

1

1

1

0

The truth table above lists all the variables in function as inputs (x, y and z) and the output of function as column F1. In order to derive a gate level implementation we will need to analyze all possible combination of inputs and corresponding output.

Digital Logic fundamentals topics

Digital basics tutorial

Binary number discussion, 1 and 2 complement discussion,

Binary arithmetic, Signed Magnitude, overflow, examples

Gray coding, Binary coded digital (BCD) coding, BCD addition

Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates

Discussion of Boolean Algebra with examples. Duality Principle, Huntington Postulates, Theorems of Boolean Algebra - discussion with examples, Boolean Functions, Canonical and Standard Forms, Minterms and Maxterms Sum of Minterms, Product of Maxterms or Canonical Forms, Karnaugh map or K-map discussion 2, 3, ,4 and 5 var’s

Prime Implicant and Gate level minimization examples.

Digital basics tutorial

Binary number discussion, 1 and 2 complement discussion,

Binary arithmetic, Signed Magnitude, overflow, examples

Gray coding, Binary coded digital (BCD) coding, BCD addition

Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates

Discussion of Boolean Algebra with examples. Duality Principle, Huntington Postulates, Theorems of Boolean Algebra -

x

y

x+y

z

Z’

(x+y)z’

A boolean function is an expression consisting for binary variables, binary operators and constants (1 or 0). The Boolean function can be used to represent a logical scenario. Sometimes the functions can be minimized to lowest possible number of variables. In this section we will discuss boolean function with an example. We will also derive a truth-table and an equivalent gate level implementation.

Next, we will discuss the equivalent truth table for boolean function F1.

Resources

Digital design resources

Clock Domain Crossing Discussion with

rtl & testbench example.

Rate change(asynchronous) FIFO design and fifo depth calculation.

Half-adder , Full-adder , 4-bit binary adder , adder-subtractor circuit, overflow with rtl & testbench. Binary Multiplier, Parity error TT

Arithmetic, logical, shift micro-operations . Stack organization, LIFO, RPN discussion.

VHDL rtl - Synchronous flip-flop , latch, shim to improve timing and counter example

RTL coding guidelines. ICG cell, Assertions, $assertkill, levels.

Digital design Interview questions.

FPGA Interview. FPGA flow.

Guide to Graduate studies in US

Pipeline vs. Parallel processing.

Digital design resources

Clock Domain Crossing Discussion with

rtl & testbench example.

Rate change(asynchronous) FIFO design and fifo depth calculation.

Half-

VHDL rtl -

Digital design Interview questions.

FPGA Interview. FPGA flow.

Guide to Graduate studies in US

Pipeline vs. Parallel processing.

Next, we will discuss the equivalent gate level Implementation for Function F1.

The circuit is most optimized implementation of the boolean function. F1 = (x + y)z’

Solved 3 var K-map Examples

1. F(x,y,z) =sum(0,1,6,7) - Minimization.

2. F(x,y,z) =sum(0,1,4,5,6,7) - Minimization.

3. F(x,y,z) =sum(3,4,6,7) - Minimization.

4. F(x,y,z) =sum(0,1,2,3,4,5,6,7) - Minimization.

Four variable K-Map minimization example.

1. F(x,y,w, z) = (0,1,2,3,4,6,11,14)

2. F(x,y,w, z) = (0,2,4,6,12,14)

3. F(x,y,w, z) = (0,2,5,7,8,11,13,15)

2. F(x,y,w, z) = (0,2,4,6,12,14)

3. F(x,y,w, z) = (0,2,5,7,8,11,13,15)

Interview Questions. Main, FPGA, Digital Fundamentals