Verilog constant
propagation Synthesis.
Constant Propagation is an optimization technique employed by synthesis tools to minimize hardware implementation.
This is achieved by optimizing away the logic for which parameters are configured to keep it disabled. This technique is not limited to module
boundaries
and the hardware can be optimized away both inside and outside. This two way optimization depends on the output port dependencies on the parameter configurations for the module.
Lets discuss it in more details with an example below.