﻿ Verilog shift microoperations logical shift right let, circular shift right left.
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Introduction Operators Initial stms Block vs. Non Blk IF-ELSE, CASE FORLOOP File Operations Read .bin format Function Call Testbench Random Numbers Shift Micro-ops Sync RAM Mem Generate Assertions Signed RTL
~\Downloads\fc_v\shift_LR.v.html // Test Bench for generating random numbers
module shift_tb ();
reg clk, rst;
reg[7:0] x_q;
reg[7:0] x_d;
reg[4:0] q_cnt;

integer k, i;
integer out;
// Generate Clock
initial
begin
clk = 0;
forever #10 clk = ~clk;
end
// Release reset
initial begin
rst = 0;
# 50 rst = 1;
end
// Use positive edge of clock to shift the register value
// Implement logical right shift
always @(posedge clk or
negedge rst)
begin
if (!rst)
begin
x_q <= 'hed;
q_cnt <= 0;
out = \$fopen("shift_LR.vec","w");
end
else
begin
x_q <= x_d;
q_cnt <= q_cnt + 1;
\$fdisplay(out, "Pass %d Shift value in hex %b", q_cnt, x_q);
end
end
// shift logic
always @(*)
begin
x_d = x_q;
x_d[7] = 0;
for (i=0; i<7; i=i+1)
begin
x_d[i] = x_q[i+1];
end
end
endmodule
Verilog code for logical shift right microoperations.
Logical Shift Right (LSR) verilog code and simulation results. LSR discussion here.

Logical Shift left (LSL)
verilog code, simulation results and discussion here.

Circular Shift Right (CSR)
Circular Shift Left (CSL) verilog code, simulation results and discussion.
We are going to discuss verilog code for LSR here.
Resources
Clock Domain Crossing Discussion with
rtl & testbench example.

Ratechange(asynchronous) FIFO design and fifo depth calculation.

RTL coding guidelines. ICG cell, \$assertkill Digital design Interview questions.
FPGA Interview. FPGA flow. Guide to Graduate studies in US
Pipeline vs. Parallel processing.

Shift micro-operations in RTL

In this section we will implement verilog code for shift micro-operations. Also discussed are results of simulations for LSR, LSL, CSR and CSL.
Interview Questions. Main, FPGA, Digital Fundamentals
Digital Logic fundamentals topics @ fcd
Digital basics tutorial
Binary number discussion, 1 and 2 complement discussion,
Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates
Discussion of Boolean Algebra with examples.
Duality Principle, Huntington Postulates, Theorems of Boolean Algebra - discussion with examples, Boolean Functions, Canonical and Standard Forms, Minterms and Maxterms
Karnaugh map or K-map discussion 2, 3, ,4 and 5 var’s