Role of synthesis in digital chip design.

Synthesis: Its a technique automated by EDA tools to map high level behavioral designs coded with help of Register Transfer Level languages into gates. These gates are distributed over an area and connected with wires.

These synthesized gate level abstraction or net lists are then optimized in several steps to attain faster speed, low area, low power and test-ability.

In short, synthesis is used to port RTL design to gate level design. The steps are also shown pictorially below.

VLSI Synthesis for Digital Logic