The memory unit is a critical component of digital computing where data needs to be read, processed and stored frequently. Following block diagram shows the connectivity of CPU, memory and I/O unit through bus connections. As the requirements of storage capacity increases with the processing power of CPU, we need to design systems with several levels of storage. This levels of hierarchy requires several tradeoffs on design platform. One such tradeoff is with distance of the memory from CPU. As the distance increases, the delay on data transfer increases which in-turn reduces overall performance of the device reduces.
Block diagram on right shows the connectivity of CPU, memory and I/O unit through bus connections. Memory needs to be organized around CPU and central bus-sub system. Central bus-subsystem is also know as memory bus-subsystem and needs to handle all data communication in-between cpu and main memory.