Interrupt status register (ISR) - Each bit of the register captures the status of the interrupts from individual peripherals.
Interrupt mask register (IMR) - Each bit of the register masks the interrupts from individual peripherals.
Interrupt pending register (IPR) - If IMR bit is set the interrupt will show-up in IPR bit.
Interrupt clear register (ICR) - Writing to this register bit will clear the intr bit from ISR.
Some essential features of interrupt controllers are below:
1. Multiple interrupt request inputs gets stored in IPR and ISR. One bit is generally assigned for each interrupt source.
2. Software can mask out particular interrupt requests by setting the corresponding bit in IMR.
3. Interrupts can be prioritized in hardware by implementing interrupt nesting of hardware sources.
Software is still expected to perform following functions in interrupt handler:
• Determine the interrupt source.