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Tristate buffers can be used for shared bus interfaces, bidirectional IOs and shared memory interfaces. These onchip implementations allows bi-directional IO’s to switch polarities from input to output. Also when used on external chip-memory interface, these can switch to floating or high Z outputs to allow other devices on the same shared bus to access same memory.

On chip implementations using tristate buffer.

Resources (contd)

Verilog RTL code examples for front-end chip design.

Digital Design Topics

Half-adder , full-adder ,

Adder-sub tractor

Stack Organization - LIFO, RPN

Parity Generation and error checking

Binary multiplier circuit.

CMOS introduction

Digital fundamentals -

RTL coding guidelines. ICG cell, Assertions, $assertkill, levels. Chandle

Pipeline vs. Parallel processing.

Verilog RTL code examples for front-

Half-

Adder-

Stack Organization -

Binary multiplier circuit.

CMOS introduction

Digital fundamentals -

RTL coding guidelines. ICG cell, Assertions, $assertkill, levels. Chandle

Pipeline vs. Parallel processing.

Tri-

Introduction to Verilog RTL

Verilog Operators. Initial Statements in verilog. Clock and Reset generation.

Blocking vs. Non-blocking Statements.

Conditional Statements & ‘always’ block.

Counter Implementation.

File Operations - $fopen, $fclose, $fdisplay, $fscanf . Read binary or hex format files - $readmemh, $readmemb.

FOR Loop use in verilog code

Verilog Operators. Initial Statements in verilog. Clock and Reset generation.

Blocking vs. Non-

Conditional Statements & ‘always’ block.

Counter Implementation.

File Operations -

FOR Loop use in verilog code

Digital Logic fundamentals topics

Digital basics tutorial. Binary number discussion, 1 and 2 complement discussion, Binary arithmetic, Signed Magnitude, overflow, examples. Gray coding, Binary coded digital (BCD) coding, BCD addition. Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates. 0iscussion of Boolean Algebra with examples. Duality Principle, Huntington Postulates, Theorems of Boolean Algebra - discussion with examples, Boolean Functions, Canonical and Standard Forms, Minterms and Maxterms Sum of Minterms, Product of Maxterms or Canonical Forms, Karnaugh map or K-map discussion 2, 3, ,4 and 5 var’s. Prime Implicant and Gate level minimization examples.

Digital basics tutorial. Binary number discussion, 1 and 2 complement discussion, Binary arithmetic, Signed Magnitude, overflow, examples. Gray coding, Binary coded digital (BCD) coding, BCD addition. Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates. 0iscussion of Boolean Algebra with examples. Duality Principle, Huntington Postulates, Theorems of Boolean Algebra -

LTE - Long Term Evolution topics.

Computer Organization.

Computer Introduction. Building blocks - ALU, ACC, PC, Registers, Stack Pointer, IR, timing and control unit.

Memory Organization. Cache memory, fully-associative cache , hardware architecture, match circuit, control circuit. Direct-mapped cache , main memory and discussion.

Interrupt controller, Vectored Interrupt Controller. Interrupt registers

Computer Introduction. Building blocks -

Memory Organization. Cache memory, fully-

Interrupt controller, Vectored Interrupt Controller. Interrupt registers

Solved Examples for 3 variable Kmaps

1. F(x,y,z) = (0,1,6,7) - Minimization, on this page.

2. F(x,y,z) = (0,1,4,5,6,7) - Minimization from here.

3. F(x,y,z) = (3,4,6,7) - Minimization from here.

4. F(x,y,z) = (0,1,2,3,4,5,6,7) - Minimization from here.

1. F(x,y,z) = (0,1,6,7) -

RESOURCES

5 Steps required to build a functional FPGA load (valid for most EDA flows)

How to implement a Integrated Clock Gating (ICG) cell from vendor library.

CMOS Digital Integrated Circuit design for VLSI.

Tri-

ENA |
IN |
OUT |

0 |
0 |
Z |

0 |
1 |
Z |

1 |
0 |
0 |

1 |
1 |
1 |

Verilog code for tristate buffer.

Interview Questions. Main, FPGA, Digital basics