Home.Verilog.Digital Design.Digital Basics.Python.RF Basics.
Previous.
Next.
Custom Search

Feedback ? Send it to admin@fullchipdesign.com or join me at fullchip@gmail.com

Legal Disclaimer

Chip Designing for ASIC/ FPGA Design engineers and Students
FULLCHIPDESIGN
Digital-logic Design...  Dream for many students… start learning front-end…
Try navigation bar on top to explore the contents @ fullchipdesign

Legal Disclaimer

Custom Search

Minimum Detectable Signal (MDS)

MDS is a level 3 dB above the noise floor. The value of MDS is calculated with the help of following formula.

MDS = kTBF

k = Boltzmann’s constant

T = Temperature in degree Kelvin

B = Noise Bandwidth

F = Noise Factor

Dynamic Range (DR)

Range of input powers at which a receiver can operate is called dynamic range of the system

Lower End: - Lowest detectable input power is sometimes characterized by the MDS (Minimum Detectable Signal)

Upper End: - Third order intermodulation products (IP3) limits the performance of the receiver at the upper end

A commonly accepted equation/definition for dynamic range is: