﻿ universal gate NAND, NOR & XNOR symbols and truth tables.
Custom Search
Chip Designing for ASIC/ FPGA Design engineers and Students
FULLCHIPDESIGN
Digital-logic Design...  Dream for many students… start learning front-end…
@TYH :- 4G LTE Long Term Evolution Tutorial, CloudComputing
Get Noticed:- Submit your own content to be published on fullchipdesign.com

Send it to fullchip@gmail.com

Combination of fundamental logic gates:

Gate 5: NAND. Description: This gate is fundamental for any operation where output is complement of product of all binary inputs.

Output = (Input1 * Input2 …….. * Input N)’

Where, outputs and inputs are all in binary values ’1’ or ’0’.

Gate 6: NOR

Description:  This gate is fundamental of any operation where output is complement of addition of all binary inputs.

Output = (Input1 + Input2 …….. + Input N)’

Where, outputs and inputs are all in binary values ’1’ or ’0’

Gate 7: Exclusive-NOR (XNOR)

Description:  This gate is fundamental of any operation where output is low only when two binary inputs are different.

Output = (Input1)’*(Input2)’ +  (Input1) * (Input2)

Where, outputs and inputs are all in binary values ’1’ or ’0’

Digital Logic Gates: NAND, NOR & XNOR

X (In 1)
Y (In 2)
Z (Out)
0
0
1
0
1
1
1
0
1
1
1
0
X (In 1)
Y (In 2)
Z (Out)
0
0
1
0
1
0
1
0
0
1
1
0
X (Input 1)
Y (Input 2)
Z (Output)
0
0
1
0
1
0
1
0
0
1
1
1
This gate is also know as universal gate. Any logic can be implemented by only using NAND gates.
Binary Numbers 1s_complement 2s_complement Binary Subtraction Binary Sub. Ex's Sign_magnitude SignM EX Gray Coding BCD coding Digital gates NAND NOR & XNOR Theorems Boolean Functions BFunc Examples Minterm Maxterm Sum of Minterms Prdt of Maxterms 2 var K-map 3 var K-map 4 var K-map 5 var K-map Prime Implicant PI example K-map Ex's KMap minimization 2 var EX
Resources
Verilog RTL code examples for front-end chip design.
Digital Design Topics
Stack Organization - LIFO, RPN
RTL coding guidelines. ICG cell, Assertions, , levelsChandle
Pipeline vs. Parallel processing.
Interview Questions. Main, FPGA, Digital Fundamentals