﻿ Three (3) variable K-map minimization, karnaugh map minimization discussion with examples. Digital design involving three variables.
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3 - variable Karnaugh map (K-map)

Truth Table for variables  x, y and z.

3 variable K– map plot below.

K-map location Number

x

y

z

Output Function

0

0

0

0

x’y’z’

1

0

0

1

x’y’z

2

0

1

0

x’yz’

3

0

1

1

x’yz

4

1

0

0

xy’z’

5

1

0

1

xy’z

6

1

1

0

xyz’

7

1

1

1

xyz

00

01

4

5

11

10

7

6

x’y’z’

x’y’z

x’yz

x’yz’

xy’z’

xy’z

xyz

xyz’

0

1

x

yz

Resources
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The K-map for 3 variables is plotted above. You will notice the columns for 11 and 10 are inter-changed. This is done to allow only one variable to change across adjacent cells. This adjustment in columns allows in minimization of logic mapped into tables.
Any adjacent 1, 2, 4 or 8 cells can be grouped to find a minimized logic value.
Solved 3 var K-map Examples
1. F(x,y,z) =     (0,1,6,7) - Answer.
2. F(x,y,z) =     (0,1,4,5,6,7) - Answer.
3. F(x,y,z) =     (3,4,6,7) - Answer.

Minimize following 3 var function.

F(x,y,z) =     (0,1,6,7)

Above is a common format of representing the K-map problems. The numbers 0,1,6,7 are the location of cells in the 3-var k-map table discussed below.  3 variable K– map with 1 and 0 values assigned to cells is shown in table below.

The K-map for 3 variables is plotted above. You will notice the column for 11 and 10 is inter-changed. This is done to allow only one variable to change across adjacent cells. This adjustment in columns allows in minimization of logic mapped into tables.
Any adjacent 2, 4 or 8 cells can be grouped to find a minimized logic value. Following plot will show grouping of adjacent cells.
LTE - Long Term Evolution topics

00

01

4

5

11

10

7

6

x’y’z’ = 1

x’y’z = 1

x’yz = 0

x’yz’ = 0

xy’z’ = 0

xy’z = 0

Xyz = 1

xyz’ = 1

0

1

x

yz

F = x’y’(z+z’) + xy(z+z’)
F= x’y’ + xy .. Final Answer.
The two step minimization equation is shown below.
With reference to the table above the cells under the dotted box’s can be combined to come-up with following reduced  equation.
Interview Questions. Main, FPGA, Digital Fundamentals