﻿ Digital signal logic values Z X 0 1 U H L W -
Custom Search
Chip Designing for ASIC/ FPGA Design engineers and Students
FULLCHIPDESIGN
Digital-logic Design...  Dream for many students… start learning front-end…
@TYH :- 4G LTE Long Term Evolution Tutorial, CloudComputing
Get Noticed:- Submit your own content to be published on fullchipdesign.com

Send it to fullchip@gmail.com

Digital Logic signal values
Digital Logic signal values are all intermediate to final outputs of logical circuits involving gates, registers, wires and flops.
Primary and most common Digital Logic signal values are listed below.

0 :  Low :  Logical expression value equals false.
1 :  High:  Logical expression value equals true.
Z :  High Impedance : No drivers to signal temporary or permanent results in this state.
X : Conflict : A signal is concurrently driven to 0 and 1.
U: Un-initialized : A signal is un-initialized due to missing default or reset
IEEE 1164 list some other states for signal states which are also widely known as VHDL std_logic.

The remaining set of digital logic signal values are related to signal strength.
Shim Events, Trans Logic Values Signals
L : Weak 0 : An indicator of signal strength which says almost zero.
H: Weak 1 :  An indicator of signal strength which says almost one.
- : Don’t care :  No effect on operation of circuit with any state of signal.
W: Weak unknown : Almost unknown with some hint of valid state.
Digital Logic fundamentals topics @ fcd
Digital basics tutorial
Binary number discussion, 1 and 2 complement discussion,
Digital logic gates basic (AND, OR, XOR, NOT) and derived (NAND, NOR and XNOR). Drive XOR from NAND gates. Drive XOR from NOR gates
Discussion of Boolean Algebra with examples.
Duality Principle, Huntington Postulates, Theorems of Boolean Algebra - discussion with examples, Boolean Functions, Canonical and Standard Forms, Minterms and Maxterms
Karnaugh map or K-map discussion 2, 3, ,4 and 5 var’s
Interview Questions. Main, FPGA, Digital Fundamentals