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Universal Bitwise operations - NAND, NOR and XNOR. Verilog code and test-bench  
Bitwise - Operation on individual bits of registers r1 and r2. Results are stored in register ‘acc’.
C:\iverilog\samples>..\bin\vvp step
******* Universal Bitwise NAND ********
Time=                   0 (Nano seconds)
ACC = 01
******* Universal Bitwise NOR *********
Time=                   5 (Nano seconds)
ACC = 00
****** Universal Bitwise XNOR ********
Time=                  25 (Nano seconds)
ACC = 10
Results for above program is shown below: AND NOR and XNOR .
C:\iverilog\samples\verilog_operators2.v.html module tb_opereators

reg[1:0] r1;
reg[1:0] r2;
reg[1:0] acc;

initial begin
        $display ("****************************");
        $monitor (" Time=%t\n ACC = %b", $time, acc);  
        r1 = 2'b10;
        r2 = 2'b11;
        /* universal NAND opeartion */
        acc = r1 ~& r2;
        $display ("******* Universal Bitwise NAND ***********");
        /* NOR */
        # 5 acc = r1 ~| r2;
        $display ("******* Universal Bitwise NOR ************");
        r1 = 2'b00;
        r2 = 2'b01;
        /* Bitwise XNOR */
        # 5 acc = r1 ~^ r2;
        $display ("****** Universal Bitwise XNOR **********");

Bitwise Universal
Interview Questions. Main, FPGA, Digital Fundamentals

In following verilog testbench code  corresponding bit of each register r1, r2 is individually operated for nand, nor or xnor logic and stored in corresponding bit position of acc register. This kind of operation is know as bitwise logic.

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Interview Questions. Main, FPGA, Digital Fundamentals