Chip Designing for ASIC/ FPGA Design engineers and Students

FULLCHIPDESIGN

Digital-logic Design...  Dream for many students… start learning front-end…

PICS

Topics @TYH :- 4G LTE Tutorial, GVIM editor, Smart-Phone, Cloud Computing

Computer Organization.
Memory Organization.
Cache Organization.
Interrupt controller.

Arithmetic micro operations

Arithmetic operations performed on the contents of registers are categorized as arithmetic microoperations.
Lets assume three registers.

1. Accumulator register AC.
2. General purpose register R1.
3. General purpose register R2.

Following is the list of arithmetic microoperations that can be performed on the three registers.

1. Increment.
2. Decrement.
3. Binary Addition
4. Binary Subtract.
5. 1’s complement.
6. 2’s complement.
7. Binary subtraction using 2’s complement addition.

Detailed discussion below:-

Detailed discussion on Arithmetic microoperations:-
Increment the contents of any of the three registers.
Some examples:-
AC = AC + 1
R1 = R1 + 1
R2 = R2 + 1

Decrement the contents of accumulator.
Some examples:-
AC = AC - 1
R1 = R1 - 1
R2 = R2 - 1

Add contents of registers R1 and R2 and transfer the sum to AC. (Binary adder circuit)
Some examples:-
AC = R1 + R2




Subtract contents of registers R1 and R2 and transfer the results to AC. (Binary adder-subtractor circuit)
Some examples:-
AC = R1 - R2
AC = AC -R1

1’s complement. (1’s complement discussion)
Some examples:-
AC = (AC)’
R1 = (R1)’
R2 =(R2)’

2’s complement. (2’s complement discussion)
Some examples:-
AC = AC’ + 1
R1 = R1’ +1
R2 = R2’ +1

2’s complement addition instead of subtraction.
Some examples:-
AC = R1 + R2’ + 1 instead of R1- R2

Arithmetic, logical, shift micro-operations, Overflow

Resources

Clock Domain Crossing Discussion with
rtl & testbench example.

Rate change(asynchronous) FIFO design and fifo depth calculation.

Half-adder, Full-adder, 4-bit binary adder , adder-subtractor circuit, overflow with rtl & testbench. Binary Multiplier, Parity error TT
Arithmetic, logical, shift micro-operations. Stack organization, LIFO, RPN discussion.
VHDL rtl - Synchronous flip-flop, latch, shim to improve timing and counter example

RTL coding guidelines. ICG cell, Assertions, $assertkill, levels.
Digital design Interview questions.
FPGA Interview. FPGA flow.
Guide to Graduate studies in US

Pipeline vs. Parallel processing.

Arithmetic micro-ops, logical micro -ops, shift micro-operations, Overflow Aritmetic N Examples

Hot Topics @FCD
Cloud Computing
Inside Smart Phones

Overflow

Binary adder-subtractor circuit

Full-adder RTL & test-bench

LTE - Long Term Evolution topics from here

Arithmetic, logical, shift micro-operations,

Interview Questions. Main, FPGA, Digital Fundamentals